Generic Makefile for UVM simulations

Given the widespread usage of UVM across the globe, many first-timers to UVM find it hard to remember all relevant options to their favorite simulator to get going with UVM. Our Go2UVM approach is addressing this very issue via a generic Makefile. Given most of the VLSI engineers are familiar with the Makefile use model, we provide a free-to-use (even for commercial deployment) Makefile here:

So how does this work?

  1. Create a text file named “flist” that contains names (and paths as necessary) of all the design and Testbench files.
  2. Choose your favorite simulator – Synopsys, Cadence, Mentor, or Aldec – we support all of them in a single Makefile.
  3. On a terminal type: make cvc2_gui TOP=my_chip_uvm_tb_top TEST=my_uvm_test

That’s it!

Here are different EDA tools supported along with our Makefile target names:

  • VCS – make cvc1
  • VCS GUI – make cvc1_gui
  • Questa – make cvc2
  • Questa GUI – make cvc2_gui
  • Cadence IUS – make cvc3
  • Cadence IUS GUI – make cvc3_gui
  • Aldec Riviera – make cvc4
  • Aldec Riviera – make cvc4_gui

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